1. Deepak Ranjan Nayak, Navakanta Bhat, Murugesan Venkatapathi, and Siva Umapathy, "Signal Enhancement from Tunable SERS Substrates: Design and Demonstration of Multiple Regimes of Enhancement", The Journal of Physical Chemistry C Article ASAP, DOI: 10.1021/acs.jpcc.8b01814

  2. C.S. Prajapati, Navakanta Bhat, “Self-heating oxidized suspended Pt nanowire for high performance hydrogen sensor”, Sensors and Actuators B: Chemical, vol. 260, pp. 236-242, 2018

  3. Vinay Kumar, Suraj Hebbar, Rahila Kalam, Sachin Panwar, Sujay Prasad, SS Srikanta, PR Krishnaswamy, Navakanta Bhat, “Creatinine-Iron Complex and its Use in Electrochemical Measurement of Urine Creatinine”, IEEE Sensors Journal, vol. 18, no. 2, pp. 830-836, 2018

  4. Hareesh Chandrasekar, KN Bhat, Muralidharan Rangarajan, Srinivasan Raghavan, Navakanta Bhat, “Thickness Dependent Parasitic Channel Formation at AlN/Si Interfaces”, Nature Scientific Reports, 7, 15749, 2017

  5. S Bhattacharjee, KL Ganapathi, S Mohan, Navakanta Bhat, “A sub-thermionic MoS2 FET with tunable transport” Applied Physics Letters 111 (16), 163501, 2017, (Editor’s Pick)

  6. S Bhattacharjee, KL Ganapathi, S Mohan, Navakanta Bhat, “Interface Engineering of High-k Dielectrics and Metal Contacts for High Performance Top-Gated MoS2 FETs”, ECS Transactions 80(1), 101-107, 2017.

  7. CS Prajapati, D Visser, S Anand, Navakanta Bhat, “Honeycomb type ZnO nanostructures for sensitive and selective CO detection” Sensors and Actuators B: Chemical, vol. 252, pp. 764-772, 2017

  8. S Benedict, PK Basu, Navakanta Bhat, “Low power gas sensor array on flexible acetate substrate” J. Micromech. Microeng, 27 (075024), 2017.

  9. R Sai, SA Shivashankar, M Yamaguchi, N Bhat, “Magnetic Nanoferrites for RF CMOS: Enabling 5G and Beyond” The Electrochemical Society Interface 26 (4), 71-76, 2017.

  10. Pallavi Dasgupta, Vinay Kumar, Patnam R Krishnaswamy, Navakanta Bhat, "Development of Biosensor for detection of Serum Creatinine", CSI Transactions on ICT (Accepted but not yet published), 2017. N Basu, AK Konduri, PK Basu, S Keshavan, MM Varma, Navakanta Bhat, “Flexible, Label-Free DNA Sensor using Platinum oxide as the sensing element” IEEE Sensors Journal 17 (19), pp. 6140-6147, 2017.

  11. D Visser, Z Ye, CS Prajapati, Navakanta Bhat, S Anand, “Investigations of Sol-Gel ZnO Films Nanostructured by Reactive Ion Beam Etching for Broadband Anti-Reflection” ECS Journal of Solid State Science and Technology 6 (9), P653-P659, 2017.

  12. Vinay Kumar, Nikhila Kashyap D.M., Suraj Hebbar, Swetha R, Sujay Prasad, Kamala T, S Srikanta, P.R. Krishnaswamy, and Navakanta Bhat,"Aza-heterocyclic Receptors for Direct Electron Transfer Hemoglobin Biosensor" Nature Scientific Reports, 7, 42031, 2017

  13. C.S. Prajapati, Rohith Soman, S. B. Rudraswamy, M.M. Nayak and Navakanta Bhat, “Single Chip Gas Sensor Array for Air Quality Monitoring”, IEEE Journal of Microelectromechanical Systems, 26, (2), pp 433-439, 2017

  14. Shubhadeep Bhattacharjee, Kolla Lakshmi Ganapathi, Hareesh Chandrasekar, Tathagata Paul, Sangeneni Mohan, Arindam Ghosh, Srinivasan Raghavan, Navakanta Bhat, “Nitride Dielectric Environments to Suppress Surface Optical Phonon Dominated Scattering in High-Performance Multilayer MoS2 FETs”, Advanced Electronic Materials, 3(1), 2017

  15. Palash Kumar Basu, Samatha Benedict, Sangeeth Kallat, Navakanta Bhat, “A Suspended Low Power Gas Sensor with In-Plane Heater”, IEEE Journal of Microelectromechanical Systems 26, (1), pp 48-50, 2017/10/22

  16. D R Nayak, N Bhat, M Venkatapathi, S Umapathy, “Impact of ultrathin dielectric spacers on SERS: energy transfer between polarized charges and plasmons”, Journal of Materials Chemistry C 5 (8), 2123-2129, 2017

  17. R Sai, S D Kulkarni, M Yamaguchi, N Bhat, SA Shivashankar, “Integrated X-Band Inductor With a Nanoferrite Film Core” IEEE Magnetics Letters 8, 1-4, 2017.

  18. R Padmanabhan, S Mohan, Y Morozumi, S Kaushal, N Bhat, “Performance and Reliability of TiO2/ZrO2/TiO2 (TZT) and AlO-Doped TZT MIM Capacitors” IEEE Transactions on Electron Devices 63 (10), 3928-3935, 2016

  19. S B Rudraswamy and Navakanta Bhat, “Optimization of RF Sputtered Ag-Doped BaTiO3-CuO Mixed Oxide Thin Film as Carbon Dioxide Sensor for Environmental Pollution Monitoring Application” IEEE Sensors Journal, Volume: 16, Issue: 13, pp 5145 – 5151, 2016

  20. AS Medury, KN Bhat, N Bhat, “Impact of carrier quantum confinement on the short channel effects of double-gate silicon-on-insulator FINFETs”, Microelectronics Journal 55, 143-151, 2016

  21. S Bhattacharjee, K L Ganapathi, D N Nath, N Bhat, “Surface State Engineering of Metal/MoS2 Contacts Using Sulfur Treatment for Reduced Contact Resistance and Variability”, IEEE Transactions on Electron Devices, 63 (6), 2556-2562, 2016

  22. KL Ganapathi, S Bhattacharjee, S Mohan, N Bhat “High-Performance HfO2 Back Gated Multilayer MoS2 Transistors”, IEEE Electron Device Letters 37 (6), 797-800, 2016

  23. Sromana Mukhopadhyay, Shilpa Mitra, YI Ming Ding, KL Ganapathi, Durga Misra, Navakanta Bhat, Kandabara Tapily, Robert D Clark, Steven Consiglio, Cory S Wajda, Gert J Leusink, “Effect of Post Plasma Oxidation on Ge Gate Stacks Interface Formation”, ECS Transactions, vol. 72, issue 4, pp 303-312, 2016

  24. S Sridevi, KS Vasu, N Bhat, S Asokan, AK Sood, “Ultra sensitive NO 2 gas detection using the reduced graphene oxide coated etched fiber Bragg gratings”, Sensors and Actuators B: Chemical 223, 481-486, 2016

  25. H Chandrasekar, KL Ganapathi, S Bhattacharjee, N Bhat, DN Nath, “Optical-Phonon-Limited High- Field Transport in Layered Materials”, IEEE Transactions on Electron Devices 63 (2), 767-772, 2016

  26. S Kallatt, G Umesh, N Bhat, K Majumdar, “Photoresponse of atomically thin MoS2 layers and their planar heterojunctions”, Nanoscale 8 (33), 15213-15222, 2016

  27. S Bhattacharjee, KL Ganapathi, DN Nath, N Bhat, “Intrinsic Limit for Contact Resistance in Exfoliated Multilayered MoS2 FET”, IEEE Electron Device Letters 37 (1), 119-122, 2016

  28. Growth stress induced tunability of dielectric permittivity in thin films, K.V.L.V Narayanachari, Hareesh Chandrasekar, Amiya Banerjee, K.B.R. Varma, Rajeev Ranjan, Navakanta Bhat and Srinivasan Raghavan, Journal of Applied Physics 119, 014106 (2016), doi:10.1063/1.4939466 <>.

  29. Optical Phonon Limited High Field Transport in Layered  Materials, Hareesh Chandrasekar, K.L. Ganapathi, Shubhadeep Bhattacharjee, Navakanta Bhat and Digbijoy N. Nath, accepted for publication IEEE Transactions on Electron Devices, doi:10.1109/TED.2015.2508036.

  30. Spotting 2-D Atomic Layers on Aluminum Nitride Thin Films, Hareesh Chandrasekar, Krishna Bharadwaj, Kranthikumar V, Swathi Suran, Navakanta Bhat, Manoj Varma and Srinivasan Raghavan, Nanotechnology 26, 425202 (2015), doi:10.1088/0957-4484/26/42/425202.

  31. Estimation of background carrier concentration in fully depleted GaN films, Hareesh Chandrasekar, Manikant Singh, Srinivasan Raghavan and Navakanta Bhat, Semiconductor Science and Technology 30, 115018 (2015), doi:10.1088/0268-1242/30/11/115018.

  32. Basu, Palash Kr. and Kallatt, Sangeeth and Anumol, Erumpukuthickal A. and Bhat, Navakanta, Suspended core-shell Pt-PtOx nanostructure for ultrasensitive hydrogen gas sensor, Journal of Applied Physics, 117, 224501 (2015), DOI:

  33. Kolla Lakshmi Ganapathi, Navakanta Bhat, Sangeneni Mohan, Influence of O2 flow rate on HfO2 gate dielectrics for back-gated graphene transistors, Semicond. Sci. Technol., 29, 055007, 2014.

  34. Ranajit Sai, K. J. Vinoy, Navakanta Bhat and S. A. Shivashankar, "CMOS-compatible and scalable deposition of nanocrystalline zinc ferrite thin film to improve inductance density of integrated RF inductor", IEEE Trans. Magnetics, 49, 7, 2013.

  35. K. L. Ganapathi, N. Bhat, and S. Mohan, Optimization of HfO2 films for high transconductance back gated graphene transistors, Appl. Phys. Lett. 103, 073105 (2013), DOI:10.1063/1.4818467.

  36. Thejas, N.Bhat, R.Pratap and K.N.Bhat, "Fringe Field Junctionless FET as a Sensitive Displacement Sensor", Accepted for March-2013 (Vol.2) issue by the Journal of ISSS.

  37. Sindhuja Sridharan, Navakanta Bhat and K. N. Bhat, "Silicon surface texturing with a combination of potassium hydroxide and tetra-methyl ammonium hydroxide etching", Appl. Phys. Lett., 102 (2013).

  38. Kausik Majumdar,Sangeeth Kallat and Navakanta Bhat, "High Field Carrier Transport in Graphene: Insights from Fast Current Transient", Appl. Phys. Lett. 101, 123505 (2012).

  39. Siva Rama Krishna Vanjari , Deepthi I, Sandeep K, Bharadwaj Amrutur, Navakanta Bhat and Sampath Srinivasan, "Bufferless Lysis of Erythrocytes for Isolation of Hemoglobin using Modified Cellulose Acetate Membranes", Accepted in "Biotechnology and Bioprocess Engineering".

  40. Chenniappan Venkatesh, Navakanta Bhat, K. J. Vinoy, Satish Grandhi, "Micro-electro-mechanical Torsional Varactors with Low Parasitic Capacitances and High Dynamic Range", accepted in Journal of Micro/Nanolithography, MEMS, and MOEMS (JM3).

  41. Revathy P, Navakanta Bhat, S. Mohan, "High-Performance Metal-Insulator-Metal Capacitors using Europium Oxide as Dielectric", Accepted in IEEE Transactions on Electron Devices.

  42. Harish B.P., Navakanta Bhat, "Performance and Variability Trade-off with Gate-to-Source/Drain Overlap Length", Accepted by IETE Journal of Research.

  43. Pramod M, Ranjith K, Navakanta Bhat, Gaurab Banerjee, Bharadwaj Amrutur,  K N Bhat and Praveen C Ramamurthy, "CMOS Gas Sensor Array Platform with Fourier Transform based Impedance Spectroscopy", accepted for publication in the IEEE Transactions on Circuits and Systems (TCAS-I).

  44. Ranajit Sai, Suresh D. Kulkarni, K. J. Vinoy, Navakanta Bhat and S. A. Shivashankar, "ZnFe2O4: Rapid and sub 100ºC preparation and anneal tuned magnetic properties‟, Journal of Materials Chemistry, 22, 2149, 2012.

  45. Navakanta Bhat and Juzer Vasi, “Nanoelectronics : An Overview”, Physics News, 51-61, 2011.

  46. B. P. Harish, Navakanta Bhat, Mahesh B. Patil, “Statistical Modeling of Static Leakage Power and its Variability in CMOS Circuits”, Internatinal Journal of Circuits, Systems and Signal Processing, vol 5, pages 333-345, 2011.

  47. Girish M. Navakanta Bhat, Venugopal Santhanam, “Scalable processes for fabricating non-volatile memory devices using self-assembled 2D arrays of gold nanoparticles as charge storage”, Nanoscale, vol 3, pages 4575 2011.

  48. R. G. D. Jeyasingh, N. Bhat, B. Amrutur, "Adaptive Keeper Design for Dynamic Logic Circuits Using Rate Sensing Technique, IEEE Transactions on VLSI Systems, vol 19, pages 295-304, 2011.

  49. Gururaj V. Naik and Navakanta Bhat, “Poly-ols based sol-gel Synthesis of Zinc oxide thin films”, J. Electrochem. Soc., vol 158,2, pages H85-H87, 2011.

  50. Ranajit Sai, Suresh D. Kulkarni, K. J. Vinoy, Navakanta Bhat and S. A. Shivashankar, "Energy-Efficient Synthesis of Ferrite Powders and Films", Proceedings of Mat. Res. Soc. Fall Meeting 2011, Cambridge Journals Online, Paper ID MRSF11-1386-D07-05, 2011.

  51. Ranajit Sai, Suresh D. Kulkarni, K. J. Vinoy, Navakanta Bhat and S. A. Shivashankar, "Low-Thermal-Budget Solution Processing of Thin Films of Zinc Ferrite and Other Complex Oxides", Proceedings of Mat. Res. Soc. Fall Meeting 2011, Cambridge Journals Online, Paper ID MRSF11-1400-S06-20, 2011.

  52. Kausik Majumdar,   Konjady, R. S.,   Suryaprakash, R. T., Navakanta  Bhat, “Underlap Optimization in HFinFET in Presence of Interface Traps”, IEEE Transactions on Nanotechnology,, Feb 2011.

  53. K. Majumdar, K. Murali, N. Bhat and Y. M. Lin, “External Bias Dependent Direct to Indirect Bandgap Transition in Graphene Nanoribbon,” Nano Letters, 10 (8), pp. 2857-2862, 2010. Related Article: “Graphene: Mind The Indirect Gap,” Featured Highlight, Asia Materials, Nature Publishing Group, doi:10.1038/asiamat.2010.140.

  54.  K. Majumdar, N. Bhat, P. Majhi and R. Jammy, “Effects of Parasitics and Interface Traps on Ballistic Nanowire FET In The Ultimate Quantum Capacitance Limit,” IEEE Trans. Elec. Dev., Vol. 57, No. 9, pp. 2264-2273, 2010.

  55. K. Majumdar, P. Majhi, N. Bhat and R. Jammy, “HFinFET: A Scalable, High Performance, Low Leakage Hybrid N-Channel FET,” IEEE Trans. Nanotechnology, Vol. 9, No. 3, pp. 342-344, 2010.

  56. Arun V. Thathachary, K. N. Bhat, N. Bhat, and M. S. Hegde, “Fermi Level Depinning at the Germanium Schottky Interface Through Sulphur Passivation,” Appl. Phys. Lett. 96, 152108, 2010.

  57.  K. Majumdar, K. Murali, N. Bhat and Y. M. Lin, “Intrinsic Limits of Subthreshold Slope in Biased Bilayer Graphene Transistor,” Appl. Phys. Lett., 96, 123504, 2010.

  58. B. Jayaraman, V. R. Singh, A. Asundi, N. Bhat and G. M. Hegde, "Thermo-mechanical characterization of surface-micromachined microheaters using in-line digital holography," Meas. Sci. Tech., 21, 015301, 2010.

  59. K. R. Ajayan and N. Bhat, “Linear transconductor with flipped voltage follower in 130 nm CMOS”,  Analog Integr Circ Signal Processing, Kluwer, 13 October 2009.

  60. B. Jayaraman and N. Bhat, "Performance analysis of subthreshold cascode current mirror in 130nm CMOS technology," J. Low Power Electronics, Vol. 5, No. 4, pp. 484-496, 2009.

  61. S. Hegde, Thejas and N. Bhat, "Universal Capacitance Sensor," Int. J. Micro and Nano Sys,  1(1), pp. 21-27, 2009.

  62. B. Jayaraman, N. Bhat and R. Pratap, "Thermal analysis of microheaters using mechanical dynamic response," Int. J. Micro and Nano Sys., 1(1), pp. 15-20, 2009.

  63. B. Jayaraman, N. Bhat and R. Pratap, “Thermal characterization of microheaters from the dynamic response,” J. Micromech. Microeng. 19, 085006, 2009.

  64. S. Bagga, N.Bhat and S.Mohan, ‘‘LPG Gas-Sensing System With SnO2 Thin-Film Transducer and 0.7-mu m CMOS Signal Conditioning ASIC”, IEEE Transactions on Instrumentation and Measurement 58: 3653-3658, 2009.

  65. K. Majumdar and N. Bhat, "Bandstructure Effects in Ultra-Thin-Body Double-Gate Field Effect Transistor: A Fullband Analysis," J. Appl. Phys, 103, 114503, 2008.

  66. C.Venkatesh and N. Bhat, "Reliability of torsional varactor," Invited paper, IEEE Trans. Dev. Mat. Rel, Vol. 8, No. 1, pp. 129-134, 2008.

  67. B. P. Harish, N. Bhat, and M. B. Patil, “Hybrid-CV Modeling for Estimating the Variability in Dynamic Power” J. Low Power Electronics ASP 4, 263–274 December (2008).

  68. R. Srinivasan and N Bhat, “Optimisation of Gate-Drain/Source Overlap in 90 nm NMOSFETs for Low Noise Amplifier Performance” J. Low Power Electronics, ASP 4, 240-246 August (2008).

  69. M.P. Singh, K. Shalini, S.A. Shivashankar, G.C. Deepak, N. Bhat, T. Shripathi, “Microstructure, crystallinity, and properties of low-pressure MOCVD-grown europium oxide films”, Materials Chemistry and Physics, Elsevier, 110 : 337-343, 2008.

  70. B. P. Harish, N. Bhat and M. B. Patil, "On a Generalized Framework for Modeling the Effects of Process Variations on Circuit Delay Performance Using Response Surface Methodology," IEEE Trans. on Computer - Aided Design of Integrated Circuits and Systems 26(3):pp. 606-614, 2007.

  71.  N. Bhat, “Nanoelectronics Era: Novel Device Technologies Enabling Systems on Chip,” J. Indian Institute of Science, vol. 87: 1, Jan-Mar 2007, pp. 61-74.

  72. G. Krishnan, C. U. Kshirasagar, G.K.Ananthasuresh, N. Bhat, “Micromachined High-Resolution Accelerometers,” J. Indian Institute of Science, vol. 87: 3, Jul-Sept 2007.

  73. B. P. Harish, N. Bhat and M. B. Patil, "Analytical modeling of CMOS circuit delay distribution due to concurrent variations in multiple processes,” Solid-State Electronics 50(7-8):pp.1252-1260, 2006.

  74. R. Srinivasan and N. Bhat, "Effect of gate-drain/source overlap on the noise in 90 nm N-channel metal oxide semiconductor field effect transistors," J. Appl. Phys. 99, 084505, 2006.

  75. M. P. Singh, K. Shalini, S. A. Shivashankar, G. C. Deepak and N. Bhat, "Structural and electrical properties of low pressure metalorganic chemical vapor deposition grown Eu2O3 films on Si(100)," Applied Physics Letters,89, 201901, 2006.

  76. R Srinivasan and Navakanta Bhat, “Scaling Characteristics of fNQS and ft in NMOSFETs with Uniform and Non-uniform Channel Doping,” International Journal of Electronics, Taylor and Francis Group, Vol 92, No 12, Dec 2005.

  77. Gupta and N. Bhat, “On the Performance Analysis of a Class of Neuron Circuits,” Analog Integrated Circuits and Signal Processing, Kluwer 44 (3), pp. 293-302, September 2005.

  78. R Srinivasan and NavakantaBhat, “Scaling Characteristics of fNQS and ft in NMOSFETs with and without Supply Voltage Scaling,” J. of Indian Institute of Science, Vol 85, Aug 2005.

  79. H.C. Srinivasaiah and N. Bhat, “Characterization of Sub-100nm CMOS Process Using Screening Experiment Technique,” Solid State Electronics, Vol. 49, pp 431-436, (2005).

  80. C. Venkatesh, S. Pati, N. Bhat and R. Pratap, “A Torsional MEMS Varactor with Wide Dynamic Range and Low Actuation Voltage,” Sensors and Actuators A Physical, June 2005.

  81. Gupta and N. Bhat, “Asymmetric Cross-Coupled Differential Pair Configuration to Realize Neuron Activation Function and its Derivative,” IEEE Trans. on Circuits and Systems Part II: Express Briefs, Vol. 52, No. 1, pp. 10-13, January 2005.

  82. M.P. Singh, C.S. Thakur, K. Shalini, S. Banerjee, N. Bhat, and S.A. Shivashankar, “Structural, Optical, and Electrical Characterization of Gadolinium Oxide Films Deposited by Low-pressure Metalorganic Chemical Vapour Deposition,” Journal of Applied Physic, Vol 96, No. 10, pp. 5631-5637, 15 November 2004.

  83. Gupta and N. Bhat, “Back-Gate Effect to Generate Derivative of Neuron Activation Function,” Analog Integrated Circuits and Signal Processing, Kluwer 41 (1), pp. 89-92, October 2004.

  84. R. Singh and N. Bhat, “An Offset Compensation Technique for Latch Type Sense Amplifier in High Speed Low Power SRAMs,” IEEE Transactions on VLSI Systems, June 2004, pp. 652-657.

  85. N. Bhat, “MEMS for RF Applications,” IETE Technical Review, vol. 21, no. 2, March-April 2004.

  86. K. Maitra and N. Bhat, “Impact of Gate to Source/Drain Overlap Length on 80 nm CMOS Circuit Performance,” IEEE Transactions on Electron Devices, March 2004 pp.409-414.

  87. M.P. Singh, C.S. Thakur, K. Shalini, N. Bhat, and S.A. Shivashankar, “Structural and Electrical Characterization of Erbium Oxide Films Grown on Si(100) by Low-pressure Metalorganic Chemical Vapour Deposition,” Applied Physics Letters , October 2003.

  88. N. Bhat and C.S.Thakur, “Analog CMOS Performance Degradation due to Edge Direct Tunneling (EDT) Current in sub-100nm Technology,” Invited paper for Journal of Semiconductor Technology and Science special issue on Device Reliability, September 2003.

  89. H C Srinivasaiah and N. Bhat, “Monte Carlo Analysis of the Implant Dose Sensitivity in 0.1 mm NMOSFET,” Solid-State Electronics, 47/8 pp. 1379-1383, August 2003.

  90. H C Srinivasaiah and N. Bhat, “Mixed Mode Simulation Approach to Characterize the Circuit Delay Sensitivity to Implant Dose Variations,” IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, June 2003.

  91. P.K.Saxena and N.Bhat, “Process technique for SEU reliability improvement of deep sub-micron SRAM cell,” Solid-State Electronics, Vol. 47, 4, April 2003, pp. 661-664.

  92. P.K.Saxena and N.Bhat, “SEU Reliability Improvement Due to Source-Side Charge Collection in the Deep-Submicron SRAM Cell,” IEEE Transactions on Device and Material Reliability, pp.14-17 March 2003.

  93. K. Maitra and N. Bhat, “Polyreoxidation process step for suppressing edge direct tunneling through ultrathin gate oxides in NMOSFETs,” Solid-State Electronics, Vol. 47, 1, January 2003, p. 15-17.

  94. K. Maitra and N. Bhat, “Analytical approach to integrate the different components of direct tunneling current through ultrathin gate oxides in n-channel metal oxide semiconductor field-effect transistors,” Journal of Applied Physics, Vol 93, No. 2, pp. 1064-1068, 15 January 2003.

  95. N. Bhat, A. Wang and K.C. Saraswat, “Rapid thermal anneal of gate oxides for low thermal budget TFTs,” IEEE Transactions on Electron Devices , p.63, January 1999.

  96. N. Bhat and K.C.Saraswat, “Characterization of border trap generation in rapid thermally annealed oxides deposited using silane chemistry,” Journal of Applied Physics , p. 2722, September 1998.

  97. N. Bhat, M. Cao and K.C. Saraswat, “Bias temperature instability in hydrogenated thin-film transistors,” IEEE Transactions on Electron Devices, p.1102, July 1997.

  98. N. Bhat, P.P. Apte and K.C. Saraswat, “Charge trap generation in LPCVD oxides under high field stressing,” IEEE Transactions on Electron Devices, p.554, April 1996.

  99. N. Bhat and J.Vasi, “Interface-state generation under radiation and high field stressing in reoxidized  nitrided oxide MOS capacitors,” IEEE Transactions on Nuclear Science, p.2230, Dec. 1992.